The present application relates to a correction circuit for improving feed forward or feedback regulation in switched power supplies. In particular, to switching power supplies suitable for driving a load where a load current may abruptly vary.
Switching electrical power supplies, also referred to as switched mode power supplies, are capable of efficiently converting an input voltage to an output voltage. One or more active power devices or “phases” are switched, that is, turned on and turned off in rapid succession, to control the average amount of energy that is driven from the input to an energy storage element at the output. This switching is controlled in a manner that results in a controlled voltage waveform at the output. For example, a step down converter, such as a buck converter, converts a typically unregulated or loosely regulated input DC voltage into a lower, regulated DC voltage for a rated load current (or simply, load).
A switching power supply may have one or more output phases that are controlled by a main voltage regulation feedback control loop, to regulate its output. An output phase typically includes one or more power switching devices, such as a transistor, and sometimes their drivers. These devices feed current (from the input) to a passive energy storage device such as an inductor and/or capacitor to which the output is coupled. To regulate the output voltage, the power switching devices are rapidly turned on and off, e.g. according to a pulse width modulation (PWM), with the appropriate timing and in response to voltage and current feedback from the output.
Control of output voltage in switching power supplies has long been an important consideration. For most applications, it is desirable to maintain output voltage and current at a more or less steady value, or within a desired window (range) of values. For example, power supplies that are used to power microprocessors are required to stay within a rather narrow voltage window. This is difficult because the nature of microprocessor loads is that they produce fast load transients.
A common means for controlling output voltage is the use of feedback in a feedback control system. However, such feedback control systems often require a trade-off between stability and transient response. This is due to the relatively fixed relationships between operating frequencies and control loop crossover frequencies.
Several approaches have been considered in order to address this shortcoming. One approach is to raise the switching frequency of the supply while lowering the value of the output inductor value. However, increasing the switching frequency complicates the design of the converter, and as the switching frequency increases, the efficiency of the converter decreases eventually to an unacceptable level. Reducing the output inductance of a DC-to-DC converter can improve its dynamic response. However, such a reduction results in an increase in output voltage ripple. The increased voltage ripple will in its turn reduce the room for the output voltage drop during dynamic response. In addition, a larger ripple current through the filter inductor will result in a larger RMS current through the power switches of the converter, which will reduce the overall efficiency of the converter under steady state operation. Another option is to add a “load line” which effectively raises the output impedance of the power supply to more effectively use the available window of output voltage values (e.g. U.S. Pat. No. 6,919,715). However deviations in the supply voltage can be inacceptable in some applications. Another idea is to add capacitors at the output in order to ensure that the output voltage remains in the desired window of values. However, this strategy requires a very large output capacitor (e.g., 5,000 to 10,000 uF), which is bulky and expensive, and as a result is generally not considered practical.
Further, the use of output voltage excursions to trigger circuitry that rapidly changes duty factor or gain in the control loop filter (compensator) have also been considered (e.g. U.S. Pat. No. 6,717,390). Unfortunately, this solution does not provide a fast enough response as demanded in modern microprocessor applications. This is due to the fixed rate of PWM pulses which can be slow relative to the rate of increase or decrease (slew rate) of the output voltage. Additionally, changing the loop filter parameters of a control system can lead to unstable behaviour.
Another solution is contemplated by U.S. Pat. No. 6,965,502, in which the output voltage is compared with predetermined reference voltages with a window comparator. If the output voltage moves outside the window then suppression action is taken. The size of the window determines the performance of the transient suppression system having the window too small results in noise and ripple triggering the suppression action unnecessarily and having the window larger delays detection in the output voltage.
In U.S. Pat. No. 7,521,913 the amplitude of the deviation of the detected voltage level from a target voltage is constantly estimated and is used to determine further action taken by an Active Transient Response Circuit. This approach in most of the practical cases leads to instable operation of the power converter due to the significant delay between a pulse injected at the input of the LC filter of the power stage and an output voltage response to the pulse which is observed at the output of the LC filter. Thus the Active Transient Response Circuitis likely to bring the output voltage to oscillation rather than to the stable value.
According to a solution contemplated by U.S. Pat. No. 7,615,982, a one shot pulse is provided to the plurality of phases of the power converter overriding PWM pulse train. The number of phases to where the pulse is injected is determined by the deviation of the voltage undershoot. In practice the application range of this solution is limited to multiphase power converters. Also the performance of this system is compromised due to the fact that when the output voltage starts stewing, the system generates the first pulse only for a single phase right after the first threshold level is crossed. Only if after a guard time interval, following the injected pulse, the difference between the reference voltage and the output voltage remains, then the pulse is injected to multiple phases. This results in a delay in the adequate response to a big step in load current.
U.S. Pat. No. 8,054,058 contemplates a feed forward control approach that also attempts to address the problem of voltage control. In this patent, injected and blanking pulses override a steady state pulse train in the case of the transient detection on the output voltage rail. Pulsewidths of the injected and blanking pulses are determined on the basis of the principle of capacitor charge balance which in theory provides the lowest possible voltage undershoot/overshoot and the shortest achievable time to recover from from a positive and/or negative load current step. In practice the noisy environment of the high current switching DC-to-DC converter and/or fast nonlinear changes of the load current lead to incorrect estimations of the valley point voltage and time offset. All the equations used to calculate the pulsewidths of the injected and blanking pulses assume the knowledge of the inductor and capacitor values of the converter. In practice due to aging and temperature changes their exact values are not known. As a result, these factors of uncertainty give incorrect values for the pulsewidths of the injected and blanking pulses. This in turn leads to degradation of performance and in some practical cases might give even worse undershoots/overshoots at the output voltage than there might be without using the described approach.
Thus, it would be beneficial to provide a robust control circuit for a switching power supply that avoids the problems discussed above.